1. Field
Example embodiments relate to integrated circuits (ICs), and more particularly, to a stacked semiconductor device that connects a central processing unit (CPU) to a memory via an electrical vertical element, and a method of manufacturing the same.
2. Description of the Related Art
Packaging of semiconductor ICs, e.g., memories, has been continuously developed in order to satisfy a demand for miniaturization and improve mounting efficiency. As more compact and high-performance electric/electronic products are in demand, various techniques for stacking memories are being developed.
Stacking of memories denotes a technique of vertically stacking at least two memories. The stacked memories may achieve a product with a memory capacity twice greater than that of a product achieved by a single-layer memory and may increase the efficiency of mounting area being used. Examples of a package in which a plurality of semiconductor chips are stacked include a stack-type semiconductor package in which a plurality of semiconductor chips or semiconductor device packages are stacked.